Re: [PATCH] serial: 8250_pci: Fix EXAR feature control register constants

From: Andy Shevchenko
Date: Tue Feb 07 2017 - 06:55:17 EST


+Cc Sudip

On Fri, Feb 3, 2017 at 3:22 PM, Jan Kiszka <jan.kiszka@xxxxxxxxxxx> wrote:
> According to the XR17V352 manual, bit 4 is IrDA control and bit 5 for
> 485. Fortunately, no driver used them so far.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx>
> ---
> include/uapi/linux/serial_reg.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
> index b4c0484..b1f60cb 100644
> --- a/include/uapi/linux/serial_reg.h
> +++ b/include/uapi/linux/serial_reg.h
> @@ -366,8 +366,8 @@
> #define UART_EXAR_DVID 0x8d /* Device identification */
>
> #define UART_EXAR_FCTR 0x08 /* Feature Control Register */
> -#define UART_FCTR_EXAR_IRDA 0x08 /* IrDa data encode select */
> -#define UART_FCTR_EXAR_485 0x10 /* Auto 485 half duplex dir ctl */
> +#define UART_FCTR_EXAR_IRDA 0x10 /* IrDa data encode select */
> +#define UART_FCTR_EXAR_485 0x20 /* Auto 485 half duplex dir ctl */
> #define UART_FCTR_EXAR_TRGA 0x00 /* FIFO trigger table A */
> #define UART_FCTR_EXAR_TRGB 0x60 /* FIFO trigger table B */
> #define UART_FCTR_EXAR_TRGC 0x80 /* FIFO trigger table C */



--
With Best Regards,
Andy Shevchenko