Re: [PATCH] PCI: Xilinx NWL: Remove mask for messages not supported by AXI

From: Bjorn Helgaas
Date: Fri Feb 10 2017 - 15:26:02 EST


On Tue, Jan 31, 2017 at 02:29:30PM +0530, Bharat Kumar Gogada wrote:
> - Removing support for vendor defined messages which are not
> suppoerted by AXI
>
> Signed-off-by: Bharat Kumar Gogada <bharatku@xxxxxxxxxx>

Applied to pci/host-xilinx for v4.11, thanks.

Bharat, get_maintainer.pl lists you as a contributor, but not as a
maintainer of this file. Should we update MAINTAINERS so it does?

$ ./scripts/get_maintainer.pl drivers/pci/host/pcie-xilinx-nwl.c
Bjorn Helgaas <bhelgaas@xxxxxxxxxx> (supporter:PCI SUBSYSTEM,commit_signer:11/11=100%,authored:5/11=45%,added_lines:71/999=7%,removed_lines:58/132=44%)
Michal Simek <michal.simek@xxxxxxxxxx> (supporter:ARM/ZYNQ ARCHITECTURE)
"Sören Brinkmann" <soren.brinkmann@xxxxxxxxxx> (reviewer:ARM/ZYNQ ARCHITECTURE)
Bharat Kumar Gogada <bharat.kumar.gogada@xxxxxxxxxx> (commit_signer:4/11=36%,authored:4/11=36%,added_lines:924/999=92%,removed_lines:23/132=17%)
Rob Herring <robh@xxxxxxxxxx> (commit_signer:1/11=9%)
Colin Ian King <colin.king@xxxxxxxxxxxxx> (commit_signer:1/11=9%,authored:1/11=9%)
Paul Gortmaker <paul.gortmaker@xxxxxxxxxxxxx> (commit_signer:1/11=9%,authored:1/11=9%,removed_lines:50/132=38%)
linux-pci@xxxxxxxxxxxxxxx (open list:PCI SUBSYSTEM)
linux-arm-kernel@xxxxxxxxxxxxxxxxxxx (moderated list:ARM/ZYNQ ARCHITECTURE)
linux-kernel@xxxxxxxxxxxxxxx (open list)


> ---
> drivers/pci/host/pcie-xilinx-nwl.c | 14 +-------------
> 1 files changed, 1 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c
> index 76dd094..651486a 100644
> --- a/drivers/pci/host/pcie-xilinx-nwl.c
> +++ b/drivers/pci/host/pcie-xilinx-nwl.c
> @@ -62,21 +62,9 @@
> #define CFG_ENABLE_PM_MSG_FWD BIT(1)
> #define CFG_ENABLE_INT_MSG_FWD BIT(2)
> #define CFG_ENABLE_ERR_MSG_FWD BIT(3)
> -#define CFG_ENABLE_SLT_MSG_FWD BIT(5)
> -#define CFG_ENABLE_VEN_MSG_FWD BIT(7)
> -#define CFG_ENABLE_OTH_MSG_FWD BIT(13)
> -#define CFG_ENABLE_VEN_MSG_EN BIT(14)
> -#define CFG_ENABLE_VEN_MSG_VEN_INV BIT(15)
> -#define CFG_ENABLE_VEN_MSG_VEN_ID GENMASK(31, 16)
> #define CFG_ENABLE_MSG_FILTER_MASK (CFG_ENABLE_PM_MSG_FWD | \
> CFG_ENABLE_INT_MSG_FWD | \
> - CFG_ENABLE_ERR_MSG_FWD | \
> - CFG_ENABLE_SLT_MSG_FWD | \
> - CFG_ENABLE_VEN_MSG_FWD | \
> - CFG_ENABLE_OTH_MSG_FWD | \
> - CFG_ENABLE_VEN_MSG_EN | \
> - CFG_ENABLE_VEN_MSG_VEN_INV | \
> - CFG_ENABLE_VEN_MSG_VEN_ID)
> + CFG_ENABLE_ERR_MSG_FWD)
>
> /* Misc interrupt status mask bits */
> #define MSGF_MISC_SR_RXMSG_AVAIL BIT(0)
> --
> 1.7.1
>
>
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