Re: [PATCH 1/2] [1/2] mmc: sdhci-cadence: Fix writing PHY delay

[Masahiro Yamada]

Hi.

2017-02-16 22:06 GMT+09:00 Piotr Sroka <piotrs@xxxxxxxxxxx>:
> Add polling for ACK to be sure that data are written to PHY register.
>
> Signed-off-by: Piotr Sroka <piotrs@xxxxxxxxxxx>
> ---
>  drivers/mmc/host/sdhci-cadence.c | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c
> index 4b0ecb9..c946e45 100644
> --- a/drivers/mmc/host/sdhci-cadence.c
> +++ b/drivers/mmc/host/sdhci-cadence.c
> @@ -65,11 +65,12 @@ struct sdhci_cdns_priv {
>         void __iomem *hrs_addr;
>  };
>
> -static void sdhci_cdns_write_phy_reg(struct sdhci_cdns_priv *priv,
> +static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_priv *priv,
>                                      u8 addr, u8 data)


If you have a chance to submit v2,
I want the indent of the above line adjusted.


Otherwise,

Reviewed-by: Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx>




-- 
Best Regards
Masahiro Yamada