You'll need to elaborate on that a bit further; I don't understand.There is a defect in the mbigen hardware to handle the IRQ mapping+static int hisi_mn_init_irqs_fdt(struct device *dev,Surely we expect a specific number of interrupts?
+ struct hisi_pmu *mn_pmu)
+{
+ struct hisi_mn_data *mn_data = mn_pmu->hwmod_data;
+ struct hisi_djtag_client *client = mn_data->client;
+ int irq = -1, num_irqs, i;
+
+ num_irqs = of_irq_count(dev->of_node);
+ for (i = 0; i < num_irqs; i++) {Why are we throwing these away?
+ irq = of_irq_get(dev->of_node, i);
+ if (irq < 0)
+ dev_info(dev, "No IRQ resource!\n");
+ }
+I don't understand this comment.
+ if (irq < 0)
+ return 0;
+
+ /* The last entry in the IRQ list to be chosen
+ * This is as per mbigen-v2 IRQ mapping
+ */
+ return hisi_mn_init_irq(irq, mn_pmu, client);
Why do we only use the list IRQ?
What does this have to do with the mbigen?
No ordering requirement was described in the DT binding.
for MN.
Due to this the IRQ property
of MN is made as a list and we read all IRQs and use only the last one.
I shall mention it in the comment and also add note in the DT bindings.
If the interrupts aren't usable, there's arguably not much point listing
them in the DT.
Regardless, the order of the list *must* be specified in the DT binding.
I'm sorry for creating this confusion. It was a wrong workaround due to my misunderstanding of the
IRQ mapping.
The MN will use a single IRQ for overflow in HiP07. I shall update it and resend.
But in HiP05/06 there is no support for this IRQ, So I shall modify to use polling when IRQ is not available.
Thanks,
Anurup
Thanks,
Mark.