[PATCH v5 3/4] fpga dt: bindings for Altera Partial Reconfiguration IP.
From: matthew . gerlach
Date: Fri Mar 10 2017 - 14:41:04 EST
From: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx>
Device Tree bindings for Altera Partial Reconfiguration IP.
Signed-off-by: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx>
Acked-by: Rob Herring <robh@xxxxxxxxxx>
---
v5:
fix comment as suggested by Rob Herring <robh@xxxxxxxxxx>
added Acked-by: Rob Herring <robh@xxxxxxxxxx>
v4: v3 patch set mistakenly sent out labeled as v4
v3: s/altr,pr-ip/altr,a10-pr-ip/
v2: s/Reconfiguraion/Reconfiguration/
---
Documentation/devicetree/bindings/fpga/altera-pr-ip.txt | 12 ++++++++++++
1 file changed, 12 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
new file mode 100644
index 0000000..52a294c
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
@@ -0,0 +1,12 @@
+Altera Arria10 Partial Reconfiguration IP
+
+Required properties:
+- compatible : should contain "altr,a10-pr-ip"
+- reg : base address and size for memory mapped io.
+
+Example:
+
+ fpga_mgr: fpga-mgr@ff20c000 {
+ compatible = "altr,a10-pr-ip";
+ reg = <0xff20c000 0x10>;
+ };
--
2.7.4