Re: [PATCH 01/16] docs: fpga: add a document for Intel FPGA driver overview

[Alan Tull]

On Sun, Apr 2, 2017 at 9:41 AM, Moritz Fischer <mdf@xxxxxxxxxx> wrote:
> On Sat, Apr 01, 2017 at 07:16:19PM +0800, Wu Hao wrote:
>> On Fri, Mar 31, 2017 at 01:38:06PM -0500, Alan Tull wrote:
>> > On Fri, Mar 31, 2017 at 1:24 PM,  <matthew.gerlach@xxxxxxxxxxxxxxx> wrote:
>> > >
>> > >
>> > > On Thu, 30 Mar 2017, Wu Hao wrote:
>> > >
>> > >
>> > > Hi Wu Hao,
>> > >
>> > > Great documentation. I'm looking forward to diving into the rest of the
>> > > patches. Please see my comments inline.
>> > >
>> > > Matthew Gerlach
>> > >
>> > >
>> > >> Add a document for Intel FPGA driver overview.
>> > >>
>> > >> Signed-off-by: Enno Luebbers <enno.luebbers@xxxxxxxxx>
>> > >> Signed-off-by: Xiao Guangrong <guangrong.xiao@xxxxxxxxxxxxxxx>
>> > >> Signed-off-by: Wu Hao <hao.wu@xxxxxxxxx>
>> > >> ---
>> > >> Documentation/fpga/intel-fpga.txt | 259
>> > >> ++++++++++++++++++++++++++++++++++++++
>> > >> 1 file changed, 259 insertions(+)
>> > >> create mode 100644 Documentation/fpga/intel-fpga.txt
>> > >>
>> > >> diff --git a/Documentation/fpga/intel-fpga.txt
>> > >> b/Documentation/fpga/intel-fpga.txt
>> > >> new file mode 100644
>> > >> index 0000000..9396cea
>> > >> --- /dev/null
>> > >> +++ b/Documentation/fpga/intel-fpga.txt
>> > >> @@ -0,0 +1,259 @@
>> > >>
>> > >> +===============================================================================
>> > >> +                    Intel FPGA driver Overview
>> > >>
>> > >> +-------------------------------------------------------------------------------
>> > >> +                Enno Luebbers <enno.luebbers@xxxxxxxxx>
>> > >> +                Xiao Guangrong <guangrong.xiao@xxxxxxxxxxxxxxx>
>> > >> +                Wu Hao <hao.wu@xxxxxxxxx>
>> > >> +
>> > >> +The Intel FPGA driver provides interfaces for userspace applications to
>> > >> +configure, enumerate, open, and access FPGA accelerators on platforms
>> > >> equipped
>> > >> +with Intel(R) FPGA solutions and enables system level management
>> > >> functions such
>> > >> +as FPGA reconfiguration, power management, and virtualization.
>> > >> +
>> > >
>> > >
>> > > From a Linux kernel perspective, I'm not sure this is the best name for
>> > > this code.  The name gives me the impression that it is a driver for all
>> > > Intel FPGAs, but not all Intel FPGAs are connected to the processor over a
>> > > PCIe bus.  The processor could be directely connected like the Arria10
>> > > SOCFPGA.  Such a processor could certainly benefit from this accelerator
>> > > usage model.  In an extreme case, couldn't a processor in the FPGA,
>> > > running Linux, also benefit from this accelerator model?  Is this code a
>> > > "FPGA Accelerator Framework"?
>> > >
>> > >> +HW Architecture
>> > >> +===============
>> > >> +From the OS's point of view, the FPGA hardware appears as a regular PCIe
>> > >> device.
>> > >> +The FPGA device memory is organized using a predefined data structure
>> > >> (Device
>> > >> +Feature List). Features supported by the particular FPGA device are
>> > >> exposed
>> > >> +through these data structures, as illustrated below:
>> > >> +
>> > >> +  +-------------------------------+  +-------------+
>> > >> +  |              PF               |  |     VF      |
>> > >> +  +-------------------------------+  +-------------+
>> > >> +      ^            ^         ^              ^
>> > >> +      |            |         |              |
>> > >> ++-----|------------|---------|--------------|-------+
>> > >> +|     |            |         |              |       |
>> > >> +|  +-----+     +-------+ +-------+      +-------+   |
>> > >> +|  | FME |     | Port0 | | Port1 |      | Port2 |   |
>> > >> +|  +-----+     +-------+ +-------+      +-------+   |
>> > >> +|                  ^         ^              ^       |
>> > >> +|                  |         |              |       |
>> > >> +|              +-------+ +------+       +-------+   |
>> > >> +|              |  AFU  | |  AFU |       |  AFU  |   |
>> > >> +|              +-------+ +------+       +-------+   |
>> > >> +|                                                   |
>> > >> +|                 FPGA PCIe Device                  |
>> > >> ++---------------------------------------------------+
>> > >> +
>> > >> +The driver supports PCIe SR-IOV to create virtual functions (VFs) which
>> > >> can be
>> > >> +used to assign individual accelerators to virtual machines .
>> > >
>> > >
>> > > Does this HW Architecture require an Intel FPGA?  Couldn't any vendors FPGA
>> > > be used as long as it presented itself the PCIe bus the same and contained
>> > > an appropriate Device Feature List?
>
> I think this is a good (and important) point. Especially when sysfs
> entries & ioctls constituting ABI depend on it.

Please cc linux-api@xxxxxxxxxxxxxxx on your next version of this as
linux/Documentation/process/adding-syscalls.rst specifies for new system calls.

Alan