[PATCH 3.18 111/124] pinctrl: qcom: Dont clear status bit on irq_unmask

From: Greg Kroah-Hartman
Date: Thu Apr 20 2017 - 02:47:48 EST


3.18-stable review patch. If anyone has any objections, please let me know.

------------------

From: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>

commit a6566710adaa4a7dd5e0d99820ff9c9c30ee5951 upstream.

Clearing the status bit on irq_unmask will discard any pending interrupt
that did arrive after the irq_ack, i.e. while the IRQ handler function
was executing.

Fixes: f365be092572 ("pinctrl: Add Qualcomm TLMM driver")
Cc: Stephen Boyd <sboyd@xxxxxxxxxxxxxx>
Reported-by: Timur Tabi <timur@xxxxxxxxxxxxxx>
Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
drivers/pinctrl/qcom/pinctrl-msm.c | 4 ----
1 file changed, 4 deletions(-)

--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -616,10 +616,6 @@ static void msm_gpio_irq_unmask(struct i

spin_lock_irqsave(&pctrl->lock, flags);

- val = readl(pctrl->regs + g->intr_status_reg);
- val &= ~BIT(g->intr_status_bit);
- writel(val, pctrl->regs + g->intr_status_reg);
-
val = readl(pctrl->regs + g->intr_cfg_reg);
val |= BIT(g->intr_enable_bit);
writel(val, pctrl->regs + g->intr_cfg_reg);