From the User guild https://www.altera.com/documentation/dsu1441819344145.html#dsu1442261652730, it says Configuration via Protocol (CvP) is a configuration scheme supported inArria^® V,Cyclone^® V,Stratix^® V, andArria^® 10device families. But I have seen different CvP registers bitmask defines somewhere else, so I am not positive that there is only one CvP protocol for all Altera FPGAs. Maybe we could put those Vs + Arria 10 as supported devices on the Kconfig file on the safe side?
On Thu, 20 Apr 2017, Anatolij Gustschin wrote:
Add FPGA manager driver for loading Arria/Cyclone/Stratix
FPGAs via CvP.
Signed-off-by: Anatolij Gustschin <agust@xxxxxxx>
---
Hi Anatolij,
Since you say the driver works with Arria-10, I thought I would give it a try with the Altera Arria10 PCIe DevKit I am using. I successfully
compiled your patch as an out of tree module against a 3.10 kernel. The module successfully loaded and created instances for both boards in the host.
Now that I have the driver instances running, I'm not sure howto actually perform CvP. Do you use a debugfs interface or something else? Do you use the sof or an rbf file?
Thanks,
Matthew Gerlach
Changes in v3:
- removed V-series from description (since the driver works
also with Arria-10). Also renamed functions, config option
and driver file name. Changed module description in Kconfig
......
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 161ba9d..be48c2e 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -26,6 +26,13 @@ config FPGA_MGR_ICE40_SPI
help
FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
+config FPGA_MGR_ALTERA_CVP
+ tristate "Altera Arria/Cyclone/Stratix CvP FPGA Manager"
+ depends on PCI
+ help
+ FPGA manager driver support for Altera FPGAs using the
+ CvP interface over PCIe.
+
config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 2a4f021..2e5c8b6 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -6,6 +6,7 @@
obj-$(CONFIG_FPGA) += fpga-mgr.o