RE: [PATCH v4 3/3] USB3/DWC3: Enable undefined length INCR burst type
From: Jerry Huang
Date: Tue May 02 2017 - 02:13:53 EST
> -----Original Message-----
> From: Felipe Balbi [mailto:balbi@xxxxxxxxxx]
> Sent: Friday, March 10, 2017 7:27 PM
> To: Jerry Huang <jerry.huang@xxxxxxx>; robh+dt@xxxxxxxxxx;
> mark.rutland@xxxxxxx; catalin.marinas@xxxxxxx
> Cc: linux-usb@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; Rajesh
> Bhagat <rajesh.bhagat@xxxxxxx>
> Subject: RE: [PATCH v4 3/3] USB3/DWC3: Enable undefined length INCR burst
> Jerry Huang <jerry.huang@xxxxxxx> writes:
> >> >> --
> >> >> 220.127.116.11
> >> > Hi, Balbi and all guys,
> >> > Any comment for these patches? Can they be accepted?
> >> Rob had comments which you didn't reply yet. I cannot take this
> >> patchset yet ;-)
> > Balbi,
> > I look into his mail again, which was based v3, and I replied it.
> > He had different understanding for undefined length burst mode.
> > It seems he think for this mode, just setting bit (INCRBrstEna) and
> > don't need to set other field.
> > However, according to the DWC USB3.0 controller databook, when it is
> > undefined length INCR burst mode, we still need to set one max burst
> > type, such as INCR8, which means controller will use any length less
> > than or equal to this INCR8.
> Rob, do you agree with the patch now?
Any comment for these patches? Or any chance to merge them?