On 02/05/17 15:05, Laxman Dewangan wrote:
The PWM hardware IP is taped-out with different maximum frequencyI think that your changelog needs to be updated, because it still says
on different SoCs.
From HW team:
Before Tegra186, it is 38.4MHz.
In Tegra186, it is 102MHz.
Add support to limit the clock source frequency to the maximum IP
supported frequency. Provide these values via SoC chipdata.
Signed-off-by: Laxman Dewangan <ldewangan@xxxxxxxxxx>
Changes from V1:
- Set the 48MHz maximum frequency for Tegra210 and earlier.
38.4MHz and not 48MHz.