Re: [PATCH 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

From: Geetha Akula
Date: Wed May 03 2017 - 06:32:55 EST

Hi Will,

We will resubmit the patches based on IORT.

Thank you,

On Wed, May 3, 2017 at 3:17 PM, Will Deacon <will.deacon@xxxxxxx> wrote:
> Hi Geetha,
> On Tue, May 02, 2017 at 12:01:15PM +0530, Geetha Akula wrote:
>> SMMU_IIDR register is broken on T99, that the reason we are using MIDR.
> Urgh, that's unfortunate. In what way is it broken?
>> If using MIDR is not accepted, can we enable errata based on SMMU resource size?
>> some thing like below.
> No, you need to get your model number added to IORT after all if the IIDR
> can't uniqely identify the part.
> Sorry,
> Will