Re: [PATCH 18/24] thunderbolt: Store Thunderbolt generation in the switch structure

[Mika Westerberg]

On Sun, May 21, 2017 at 10:40:41AM +0300, Mika Westerberg wrote:
> On Sun, May 21, 2017 at 07:35:21AM +0200, Lukas Wunner wrote:
> > On Sun, May 21, 2017 at 05:29:47AM +0000, Levy, Amir (Jer) wrote:
> > > On Sun, May 21 2017, 07:47 AM, Lukas Wunner wrote:
> > > > On Thu, May 18, 2017 at 05:39:08PM +0300, Mika Westerberg wrote:
> > > > > +
> > > > > +	default:
> > > > > +		sw->generation = 1;
> > > > > +		break;
> > > > 
> > > > If someone adds an entry for, say, a new TB3 controller to nhi_ids[] but
> > > > forgets to update this function, the controller is assigned the wrong
> > > > generation number.  It might be better to make TB3 the default and list
> > > > each TB1 controller instead since it's less likely for Intel to introduce
> > > > an older gen chip.
> > > > 
> > > > Generally I think it's problematic to require that multiple files are
> > > > touched whenever a new controller is added.  Isn't the generation number
> > > > or link speed (10/20/40) stored in some register in PCI config space
> > > > (VSEC 0x1234) or TB config space?
> > > 
> > > How about setting information, that isn't available from PCI, in
> > > pci_device_id.driver_data when initializing nhi_ids[]?
> > 
> > Right, that would also be possible, though reading the generation number
> > from a register would be more elegant, if such a register exists.
> 
> I don't think there is such register but I can put this information to
> the driver_data instead.

Actually these are Thunderbolt switch IDs, not NHI PCI IDs so I don't
think driver_data is the right place after all. So if no objections,
I'll update the function to default to TBT3 but keep the switch case and
add the TBT1 IDs + Win Ridge there.