Re: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception

[Alexey Brodkin]

Hi Noam,

On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote:
> From: Noam Camus <noamca@xxxxxxxxxxxx>
> 
> This commit adds the configuration CONFIG_EZNPS_MEM_ERROR.
> If set, it will cause the kernel to handle user memory error
> as a machine check exception.
> It is required in order to align the NPS simulator memory
> error handling to the one of the NPS400 real chip behavior.
> 
> Signed-off-by: Elad Kanfi <eladkan@xxxxxxxxxxxx>
> Signed-off-by: Noam Camus <noamca@xxxxxxxxxxxx>
> ---
> Âarch/arc/kernel/entry-compact.S |ÂÂÂ11 +++++++++++
> Âarch/arc/plat-eznps/KconfigÂÂÂÂÂ|ÂÂÂ11 +++++++++++
> Â2 files changed, 22 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S
> index f285dbb..d152d36 100644
> --- a/arch/arc/kernel/entry-compact.S
> +++ b/arch/arc/kernel/entry-compact.S
> @@ -203,6 +203,17 @@ END(handle_interrupt_level2)
> Â; ---------------------------------------------
> ÂENTRY(mem_service)
> Â
> +#if defined(CONFIG_EZNPS_MEM_ERROR)
> +ÂÂÂÂÂÂÂÂ; SW workaround to cover up on a difference between
> +ÂÂÂÂÂÂÂÂ; NPS real chip and simulator behaviors.
> +ÂÂÂÂÂÂÂÂ; NPS real chip will activate a machine check exception
> +ÂÂÂÂÂÂÂÂ; in case of memory error, while the simulator will
> +ÂÂÂÂÂÂÂÂ; trigger a level 2 interrupt. Therefor this code section
> +ÂÂÂÂÂÂÂÂ; should be reached only in simulation mode.
> +ÂÂÂÂÂÂÂÂ; DEAD END: display Regs and HALT

I'm not really buying that.

Why don't you just make simulator behaving exactly as your real chip?

Adding those stubs for some corner-cases here and there complicate code,
affect maintainability etc.

-Alexey