Re: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception
From: Alexey Brodkin
Date: Thu May 25 2017 - 07:31:17 EST
Hi Noam,
On Thu, 2017-05-25 at 11:26 +0000, Noam Camus wrote:
> >
> > From: Alexey Brodkin [mailto:Alexey.Brodkin@xxxxxxxxxxxx]Â;
> > Sent: Thursday, May 25, 2017 14:15 PM
>
> >
> > >
> > >
> > > diff --git a/arch/arc/kernel/entry-compact.SÂ
> > > b/arch/arc/kernel/entry-compact.S index f285dbb..d152d36 100644
> > > --- a/arch/arc/kernel/entry-compact.S
> > > +++ b/arch/arc/kernel/entry-compact.S
> > > @@ -203,6 +203,17 @@ END(handle_interrupt_level2)
> > > Â; ---------------------------------------------
> > > ÂENTRY(mem_service)
> > > Â
> > > +#if defined(CONFIG_EZNPS_MEM_ERROR)
> > > +ÂÂÂÂÂÂÂÂ; SW workaround to cover up on a difference between
> > > +ÂÂÂÂÂÂÂÂ; NPS real chip and simulator behaviors.
> > > +ÂÂÂÂÂÂÂÂ; NPS real chip will activate a machine check exception
> > > +ÂÂÂÂÂÂÂÂ; in case of memory error, while the simulator will
> > > +ÂÂÂÂÂÂÂÂ; trigger a level 2 interrupt. Therefor this code section
> > > +ÂÂÂÂÂÂÂÂ; should be reached only in simulation mode.
> > > +ÂÂÂÂÂÂÂÂ; DEAD END: display Regs and HALT
>
> >
> > I'm not really buying that.
>
> >
> > Why don't you just make simulator behaving exactly as your real chip?
> I can't change simulator core behavior. nSIM is a Synopsys proprietary code.
Well probably it worth discussing with nSIM team if they may have any suggestions
on how to align nSIM behavior with your real HW?
-Alexey