Re: [PATCH 2/2 v2] clk: qoriq: Separate root input clock for core PLLs on ls1012a
From: Stephen Boyd
Date: Thu Jun 01 2017 - 04:28:20 EST
On 03/20, Yuantian Tang wrote:
> From: Scott Wood <oss@xxxxxxxxxxxx>
>
> ls1012a has separate input root clocks for core PLLs versus the
> platform PLL, with the latter described as sysclk in the hw docs.
> If a second input clock, named "coreclk", is present, this clock will be
> used for the core PLLs.
>
> Signed-off-by: Scott Wood <oss@xxxxxxxxxxxx>
> Signed-off-by: Tang Yuantian <andy.tang@xxxxxxx>
> Acked-by: Rob Herring <robh@xxxxxxxxxx>
> ---
Applied to clk-next
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