Re: [PATCH] dmaengine: fsldma: set BWC, DAHTS and SAHTS values correctly
From: Vinod Koul
Date: Thu Jun 22 2017 - 08:59:35 EST
On Mon, Jun 19, 2017 at 04:40:04PM +0200, Thomas Breitung wrote:
> The bits of BWC, DAHTS and SAHTS in the DMA mode register must be cleared
> before a new value can be or-ed in.