On 06/27/2017 07:26 PM, matthew.gerlach@xxxxxxxxxxxxxxx wrote:
[...]
+#ifndef __ALTERA_QUADSPI_H
+#define __ALTERA_QUADSPI_H
+
+#include <linux/device.h>
+
+#define ALTERA_QUADSPI_FL_BITREV_READ BIT(0)
+#define ALTERA_QUADSPI_FL_BITREV_WRITE BIT(1)
+
+#define ALTERA_QUADSPI_MAX_NUM_FLASH_CHIP 3
+
+int altera_quadspi_create(struct device *dev, void __iomem *csr_base,
+ void __iomem *data_base, void __iomem *window_reg,
+ size_t window_size, u32 flags);
+
+int altera_qspi_add_bank(struct device *dev,
+ u32 bank, struct device_node *np);
+
+int altera_quadspi_remove_banks(struct device *dev);
Why is this header needed at all ?
This header is needed because of the very different ways
FPGAs can be used with a processor running Linux. In the case of a
soft processor in the FPGA or an ARM connected to a FPGA, this header
is not necessary because device trees are used to probe the driver.
However, if the FPGA is on a PCIe card connected to an x86, device trees
are not generally used, and the pcie driver must enumerate the
"sub-driver".
But we don't support that later part, do we ?
There is currently v2 patch set for the intel-fpga PCIe driver being
reviewed where I am adding support for version 2 of the Altera Quadspi
controller.
It'd be real nice to mention that in the cover letter with a link to
that patchset , otherwise it's real hard to understand why you did this.
This technique of separating core driver code from platform/device tree
code has been reviewed and accepted for the Altera Partial
Reconfiguration IP, Altera Freeze Bridge, and the fpga region.
--
Best regards,
Marek Vasut