Re: [PATCH 0/5] Last bits for initial 5-level paging enabling

From: Ingo Molnar
Date: Fri Jun 30 2017 - 02:59:36 EST



* Kirill A. Shutemov <kirill@xxxxxxxxxxxxx> wrote:

> > > Can I apply them in this order cleanly, without breaking bisection:
> > >
> > > > x86/mm: Rename tasksize_32bit/64bit to task_size_32bit/64bit
> > > > x86/mpx: Do not allow MPX if we have mappings above 47-bit
> > > > x86/mm: Prepare to expose larger address space to userspace
> > > > x86/mm: Allow userspace have mapping above 47-bit
> > > > x86: Enable 5-level paging support
> > >
> > > ?
> > >
> > > I.e. I'd like to move the first patch last.
> > >
> > > The reason is that we should first get all quirks and assumptions fixed, all
> > > facilities implemented - and only then enable 5-level paging as a final step which
> > > produces a well working kernel.
> > >
> > > (This should also make it slightly easier to analyze any potential regressions in
> > > earlier patches.)
> >
> > Just checked bisectability with this order on allmodconfig -- works fine.
>
> Ingo, if there's no objections, can we get these applied?

Just this week, which is the final week of the development window, we had two
fixes for the 5-level pagetables commits, so we need to delay the rest to right
after -rc1.

Could you please resend them them (and any followup patches), in the suggested
order? I don't see any conceptual problems, so this is only about timing and
maximizing stability.

Thanks,

Ingo