Re: [PATCH] ARM: dts: imx: Correct B850v3 clock assignment
From: Shawn Guo
Date: Wed Jul 12 2017 - 04:31:31 EST
On Fri, Jun 30, 2017 at 03:43:37PM +0200, Romain Perier wrote:
> From: Martyn Welch <martyn.welch@xxxxxxxxxxxxxxx>
> The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m
> to avoid stepping on the LVDS output's toes, as the PLL can't be clocked
> to the pixel clock and to the LVDS serial clock (3.5*pixel clock) at the
> same time.
> As we are using ipu1_di0 and ipu2_di0, ensure both are switched to
> to pll2_pfd2_396m to avoid issues. The LDB driver will switch the
> required IPU to ldb_di1 when it uses it to drive LVDS.
> Signed-off-by: Martyn Welch <martyn.welch@xxxxxxxxxxxxxxx>
> Signed-off-by: Romain Perier <romain.perier@xxxxxxxxxxxxx>