Re: [PATCH] clk: samsung: exynos5420: The EPLL rate table corrections

[Sylwester Nawrocki]

On 07/31/2017 10:17 PM, Stephen Boyd wrote:
> On 07/31, Sylwester Nawrocki wrote:
> > On 07/21/2017 01:19 PM, Sylwester Nawrocki wrote:
> > > This patch fixes values of the EPLL K coefficient and changes
> > > the EPLL output frequency values to match exactly what is
> > > possible to achieve with given M, P, S, K coefficients.
> > > This allows to avoid rounding errors and unexpected frequency
> > > being set with clk_set_rate(), due to recalc_rate returning
> > > different values than the PLL rate specified in the
> > > exynos5420_epll_24mhz_tbl table. E.g. this prevents a case
> > > where two consecutive clk_set_rate() calls with same argument
> > > result in different PLL output frequency.
> > >
> > > The PLL output frequencies have been calculated with formula:
> > >
> > > f = fxtal * (M * 2^16   + K) / (P * 2^S) / 2^16
> > >
> > > where fxtal = 24000000.
> > >
> > > Fixes: 9842452acd ("clk: samsung: exynos542x: Add EPLL rate table")
> > > Signed-off-by: Sylwester Nawrocki<s.nawrocki@xxxxxxxxxxx>
> > Stephen, Mike,
> >
> > Could you apply this patch directly for v4.12-rcX?
> > It fixes code added in v4.12.
> You mean v4.13? Sure.

Yes, apologies for confusing these numbers. Thanks for taking
care of the patch.

--
Regards,
Sylwester