Re: [linux-sunxi] [PATCH 10/13] [NOT FOR REVIEW NOW] clk: sunxi: Add CLK_SET_RATE_PARENT flag for H3 HDMI clock

[Icenowy Zheng]

ä 2017å8æ4æ GMT+08:00 äå12:15:27, Chen-Yu Tsai <wens@xxxxxxxx> åå:
>Hi,
>
>On Tue, Aug 1, 2017 at 9:13 PM, Icenowy Zheng <icenowy@xxxxxxx> wrote:
>> From: Jernej Skrabec <jernej.skrabec@xxxxxxxx>
>>
>> When setting the HDMI clock of H3, the PLL_VIDEO clock needs to be
>set.
>>
>> Add CLK_SET_RATE_PARENT flag for H3 HDMI clock.
>>
>> Signed-off-by: Jernej Skrabec <jernej.skrabec@xxxxxxxx>
>> Signed-off-by: Icenowy Zheng <icenowy@xxxxxxx>
>> ---
>>  drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
>b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
>> index b1127e8629d9..2ebb3d865b01 100644
>> --- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
>> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
>> @@ -474,7 +474,7 @@ static SUNXI_CCU_GATE(avs_clk,             
>"avs",          "osc24M",
>>
>>  static const char * const hdmi_parents[] = { "pll-video" };
>>  static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", hdmi_parents,
>> -                                0x150, 0, 4, 24, 2, BIT(31), 0);
>> +                                0x150, 0, 4, 24, 2, BIT(31),
>CLK_SET_RATE_PARENT);
>
>Line is longer than 80 characters.
>
>This looks independent enough so I've merged this for 4.14 with the
>offending line wrapped and the following tag added:
>
>Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")

Please don't merge this now until Jernej send it.

>
>ChenYu
>
>>
>>  static SUNXI_CCU_GATE(hdmi_ddc_clk,    "hdmi-ddc",     "osc24M",
>>                       0x154, BIT(31), 0);
>> --
>> 2.13.0
>>
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