Re: perf: multiple mmap of fd behavior on x86/ARM

[Mark Rutland]

On Fri, Aug 11, 2017 at 11:25:37AM -0400, Vince Weaver wrote:
> On Fri, 11 Aug 2017, Mark Rutland wrote:
> 
> > IIUC by 'rdpmc' you mean direct userspace counter access?
> > 
> > Patches for that never made it upstream. Last I saw, there were no
> > patches in a suitable state for review.
> 
> yes, someone from Linaro sent me some code a while back that implemented 
> the userspace side and claimed the kernel patches would appear at some 
> point.  I should try to dig up that e-mail.

IIRC, patches were sent back in 2014, but as I mentioned above, those
were far from suitable for upstream, even ignoring cases like
big.LITTLE. Said patches were never reworked and reposted.

> > > On ARM/ARM64 you can only mmap() it once, any other attempts fail.
> > 
> > Interesting. Which platform(s) are you testing on, with which kernel
> > version(s)?
> 
> This is on a Dragonbaord 401c running a vendor 64-bit 4.4 kernel,
> a Nvidia Jetson TX-1 board running a 64-bit 3.10 vendor kernel,

Just to check, how does x86 behave on each of those kernel releases?

Many things have changed since v4.4.

> as well as a Raspberry Pi 3B running a 32-bit 4.9 pi foundation kernel.

Hmm. On 32-bit this might be down to some arch/arm/mm cache aliasing
code, or it might be down to something that's changed since v4.9.

> It's a pain getting a recent-git kernel on these boards but I'm most of 
> the way to getting one booting on the Pi 3B.  (got distracted by the fact 
> that Linpack still reliably crashes the Pi-3b even with a heatsink).

IIUC, were you to modify this test to use SW events, you could test it
on an aarch64 kernel running under QEMU. To the best of my knowledge,
the code paths for HW and SW PMU are identical for mmap.

Otherwise, you might have more luck using a foundation model, which has
a PMU. 

Thanks,
Mark.