Re: [PATCH v2] x86: enable RCU based table free

[Vitaly Kuznetsov]

Peter Zijlstra <peterz@xxxxxxxxxxxxx> writes:

> On Thu, Aug 24, 2017 at 11:22:58AM +0200, Vitaly Kuznetsov wrote:
>
>> diff --git a/arch/x86/include/asm/tlb.h b/arch/x86/include/asm/tlb.h
>> index c7797307fc2b..d43a7fcafee9 100644
>> --- a/arch/x86/include/asm/tlb.h
>> +++ b/arch/x86/include/asm/tlb.h
>> @@ -15,4 +15,9 @@
>>  
>>  #include <asm-generic/tlb.h>
>>  
>> +static inline void __tlb_remove_table(void *table)
>> +{
>> +	free_page_and_swap_cache(table);
>> +}
>
> Most other archs have this in pgtable.h, only ARM* has it in tlb.h.
>

Sure, I can move it in v3 if nobody objects.

> And should we put a comment on explaining _why_ we have RCU_TABLE_FREE
> enabled?

Do you think adding something like

/*
 * While x86 architecture in general requires an IPI to perform TLB
 * shootdown, enablement code for several hypervisors overrides
 * .flush_tlb_others hook in pv_mmu_ops and implements it by issuing
 * a hypercall. To keep software pagetable walkers safe in this case we 
 * switch to RCU based table free (HAVE_RCU_TABLE_FREE). See the comment
 * below 'ifdef CONFIG_HAVE_RCU_TABLE_FREE' in include/asm-generic/tlb.h
 * for more details.
 */

before __tlb_remove_table would suffice? Or do you see a better place
for such comment?

Actually, after enabling HAVE_RCU_TABLE_FREE on x86 we may consider
switching to this mechanism globally: it seems to have negligible effect
on performace (and all major arches will already have it). One step at a
time, though.

-- 
  Vitaly