[PATCH 1/4] dt-bindings: media: Binding document for Qualcomm Camera Control Interface driver

From: Todor Tomov
Date: Mon Oct 02 2017 - 10:14:28 EST


Add DT binding document for Qualcomm Camera Control Interface driver

CC: Rob Herring <robh+dt@xxxxxxxxxx>
CC: Mark Rutland <mark.rutland@xxxxxxx>
CC: devicetree@xxxxxxxxxxxxxxx
Signed-off-by: Todor Tomov <todor.tomov@xxxxxxxxxx>
---
.../devicetree/bindings/i2c/i2c-qcom-cci.txt | 55 ++++++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt

diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
new file mode 100644
index 0000000..f4c5338
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
@@ -0,0 +1,55 @@
+Qualcomm Camera Control Interface I2C controller
+
+Required properties:
+ - compatible: Should be one of:
+ - "qcom,cci-v1.0.8" for 8916;
+ - "qcom,cci-v1.4.0" for 8996.
+ - #address-cells: Should be <1>.
+ - #size-cells: Should be <0>.
+ - reg: Base address of the controller and length of memory mapped region.
+ - reg-names: Should be "cci".
+ - interrupts: Specifier for CCI interrupt.
+ - interrupt-names: Should be "cci".
+ - clocks: List of clock specifiers, one for each entry in clock-names.
+ - clock-names: Should contain:
+ - "mmss_mmagic_ahb" - on 8996 only;
+ - "camss_top_ahb";
+ - "cci_ahb";
+ - "cci";
+ - "camss_ahb".
+ - pinctrl-names: Should contain only one value - "default".
+ - pinctrl-0: Pin control group to be used for this controller.
+
+
+Required properties on 8996:
+ - power-domains: Power domain specifier.
+
+Optional:
+ - clock-frequency: Desired I2C bus clock frequency in Hz, defaults to 100 kHz
+ if omitted.
+
+Example:
+
+ cci: qcom,cci@a0c000 {
+ compatible = "qcom,cci-v1.4.0";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xa0c000 0x1000>;
+ reg-names = "cci";
+ interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "cci";
+ power-domains = <&mmcc CAMSS_GDSC>;
+ clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
+ <&mmcc CAMSS_TOP_AHB_CLK>,
+ <&mmcc CAMSS_CCI_AHB_CLK>,
+ <&mmcc CAMSS_CCI_CLK>,
+ <&mmcc CAMSS_AHB_CLK>;
+ clock-names = "mmss_mmagic_ahb",
+ "camss_top_ahb",
+ "cci_ahb",
+ "cci",
+ "camss_ahb";
+ pinctrl-names = "default";
+ pinctrl-0 = <&cci0_default>;
+ clock-frequency = <400000>;
+ };
--
2.7.4