[PATCH tip/core/rcu 15/16] memory-barriers.txt: Fix typo in pairing example

[Paul E. McKenney]

From: Scott Tsai <scottt@xxxxxxxxx>

In the "general barrier pairing with implicit control depdendency"
example, the last write by CPU 1 was meant to change variable x and not
y. The example would be pretty uninteresting if no CPU ever changes x
and the variable was initialized to zero.

Signed-off-by: Scott Tsai <scottt@xxxxxxxxx>
Signed-off-by: Paul E. McKenney <paulmck@xxxxxxxxxxxxxxxxxx>
---
 Documentation/memory-barriers.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index 7deee1441640..f37375544d71 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -947,7 +947,7 @@ Or even:
 	===============	      ===============================
 	r1 = READ_ONCE(y);
 	<general barrier>
-	WRITE_ONCE(y, 1);     if (r2 = READ_ONCE(x)) {
+	WRITE_ONCE(x, 1);     if (r2 = READ_ONCE(x)) {
 			         <implicit control dependency>
 			         WRITE_ONCE(y, 1);
 			      }
-- 
2.5.2