Re: [PATCH v3 1/2] KVM: X86: Processor States following Reset or INIT

[Radim KrÄmÃÅ]

2017-10-11 08:39+0800, Wanpeng Li:
> 2017-10-11 2:55 GMT+08:00 Radim KrÄmÃÅ <rkrcmar@xxxxxxxxxx>:
> > 2017-10-09 15:51-0700, Wanpeng Li:
> >> From: Wanpeng Li <wanpeng.li@xxxxxxxxxxx>
> >>
> >> - XCR0 is reset to 1 by RESET but not INIT
> >> - XSS is zeroed by both RESET and INIT
> >> - BNDCFGU, BND0-BND3, BNDCFGS are zeroed by both RESET and INIT
> >>
> >> This patch does this according to SDM.
> >>
> >> Cc: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> >> Cc: Radim KrÄmÃÅ <rkrcmar@xxxxxxxxxx>
> >> Cc: Jim Mattson <jmattson@xxxxxxxxxx>
> >> Signed-off-by: Wanpeng Li <wanpeng.li@xxxxxxxxxxx>
> >> ---
> >> v2 -> v3:
> >>  * fix null pointer deference
> >>  * fix patch description
> >> v1 -> v2:
> >>  * XCR0 is not zeroed by INIT
> >>  * XSS, BNDCFGU, BND0-BND3, BNDCFGS are zeroed by both RESET and INIT
> >>
> >>  arch/x86/kvm/vmx.c |  2 ++
> >>  arch/x86/kvm/x86.c | 15 +++++++++++++++
> >>  2 files changed, 17 insertions(+)
> >>
> >> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> >> @@ -7804,18 +7804,33 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
> >>       kvm_async_pf_hash_reset(vcpu);
> >>       vcpu->arch.apf.halted = false;
> >>
> >> +     if (kvm_mpx_supported()) {
> >> +             void *mpx_state_buffer;
> >> +
> >> +             mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave, XFEATURE_MASK_BNDREGS);
> >> +             if (mpx_state_buffer)
> >> +                     memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
> >
> > I think we should call kvm_put_guest_fpu() before doing this.
> > The register might be loaded in CPU and XSAVE instruction from
> > vcpu_put() would overwrite any changes we did.
> 
> Except in vCPU creation path, vcpu_put() is called in the
> destroy/error path, so I think it doesn't matter to overwrite changes
> we did.

Yeah, creation doesn't have FPU loaded and destroy doesn't matter in any
case, but we also have the INIT path from kvm_apic_accept_events() that
can be called with loaded FPU and does not let userspace fix the state.

> >> +             mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave, XFEATURE_MASK_BNDCSR);
> >> +             if (mpx_state_buffer)
> >> +                     memset(mpx_state_buffer, 0, sizeof(u64));
> >
> > XFEATURE_MASK_BNDCSR is actually
> >
> >   struct mpx_bndcsr {
> >         u64 bndcfgu;
> >         u64 bndstatus;
> >   } __packed;
> >
> > So clearing two u64 would be correct, thanks.
> 
> SDM section 9.1.1 just mentioned BNDCFGU will be cleared after
> RESET/INIT, but not mentioned BNDSTATUS.

That section conspires ;) I found a mention in 17.3.3 Configuration and
Status Registers:

  RESET or INIT# will set BNDCFGx and BNDSTATUS registers to zero.