Re: [linux-sunxi] Re: [PATCH 5/7] drm/sun4i: backend: Offset layer buffer address by DRAM starting address

[Chen-Yu Tsai]

Hi,

On Mon, Oct 16, 2017 at 4:00 PM, Maxime Ripard
<maxime.ripard@xxxxxxxxxxxxxxxxxx> wrote:
> Hi,
>
> I've applied all the other patches.
>
> On Sat, Oct 14, 2017 at 12:02:50PM +0800, Chen-Yu Tsai wrote:
>> The display backend, as well as other peripherals that have a DRAM
>> clock gate and access DRAM directly, bypassing the system bus,
>> address the DRAM starting from 0x0, while physical addresses the
>> system uses starts from 0x40000000 (or 0x20000000 in A80's case).
>>
>> Correct the address configured into the backend layer registers
>> by PHYS_OFFSET to account for this.
>
> However, I'm a bit confused at this.
>
> The driver has been working so far, which it wouldn't have been able
> to if the address was wrong. How was this problem noticed, and how can
> that fix not be an issue in itself?

This problem was witnessed on the Cubietruck, which has 2GB of RAM.

I believe devices with less RAM function normally due to the DRAM
address wrapping around. CMA seems to always allocate its buffer
at a very high address, close to the end of DRAM. On a 1GB RAM
device, the physical address would be something like 0x78000000.
The DRAM address 0x78000000 would access the same DRAM region as
0x38000000 on a system, as the DRAM address would only span 0x0 ~
0x3fffffff. The bit 0x40000000 is non-functional in this case.

However on the Cubietruck, the DRAM is 2GB. The physical address
is 0x40000000 ~ 0xbfffffff. The buffer would be something like
0xb8000000. But the DRAM address span 0x0 ~ 0x7fffffff, meaning
the buffer address wraps around to 0x38000000, which is wrong.
The correct DRAM address for it should be 0x78000000.

ChenYu

>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
>
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