Re: [PATCH 1/2] PCI: dwc: dra7xx: Create functional dependency between PCIe and PHY

[Roger Quadros]

Hi,

On 18/10/17 15:12, Kishon Vijay Abraham I wrote:
> Hi,
> 
> On Tuesday 10 October 2017 01:29 PM, Roger Quadros wrote:
>> On 10/10/17 10:42, Kishon Vijay Abraham I wrote:
>>> Roger,
>>>
>>> On Tuesday 10 October 2017 12:49 PM, Roger Quadros wrote:
>>>> On 09/10/17 12:03, Kishon Vijay Abraham I wrote:
>>>>> PCI core access configuration space registers in resume_noirq callbacks.
>>>>> In the case of dra7xx, PIPE3 PHY connected to PCIe controller has to be
>>>>> enabled before accessing configuration space registers. Since
>>>>> PIPE3 PHY is enabled by only configuring control module registers, no
>>>>> aborts has been observed so far (though during noirq stage, interface
>>>>> clock of PIPE3 PHY is not enabled).
>>>>>
>>>>> With new TRM updates, PIPE3 PHY has to be initialized (PIPE3 PHY
>>>>> registers has to be accessed) as well which requires the interface
>>>>> clock of PIPE3 PHY to be enabled. The interface clock of PIPE3 PHY is
>>>>> derived from OCP2SCP and hence PCIe PHY is modeled as a child of
>>>>> OCP2SCP. Since pm_runtime is not enabled during noirq stage,
>>>>> pm_runtime_get_sync done in phy_init doesn't enable
>>>>> OCP2SCP clocks resulting in abort when PIPE3 PHY registers are
>>>>> accessed.
>>>>
>>>> This could be the case not only with PCIe but even with USB and SATA?
>>>
>>> right, if USB/SATA driver has no_irq callbacks then the same issue might occur.
>>
>> OK. Is this something that we should document in Documentation/phy.txt?
> 
> Yeah it could be but the dependency is not required for a lot of phy consumer
> drivers.

But they could add a no_irq callback in the future and then things break.

> Do you think it makes sense to create functional dependency between phy and
> it's consumers in phy_get?

I think making it generic makes more sense without placing restrictions on users.

> 
> Thanks
> Kishon
> 

-- 
cheers,
-roger

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