RE: [PATCH 3/4] RISC-V: Flush I$ when making a dirty page executable

From: David Laight
Date: Tue Nov 21 2017 - 11:56:55 EST

From: Palmer Dabbelt
> Sent: 20 November 2017 18:58
> The RISC-V ISA allows for instruction caches that are not coherent WRT
> stores, even on a single hart. As a result, we need to explicitly flush
> the instruction cache whenever marking a dirty page as executable in
> order to preserve the correct system behavior.

Isn't the I-flush only needed if there has been an unmap since the
previous I-flush?
Since code is rarely unmapped (exec and driver unload come to mind)
the I-flush won't be needed very often.