[PATCH 4.14 63/95] drm/amdgpu: correct reference clock value on vega10
From: Greg Kroah-Hartman
Date: Mon Dec 04 2017 - 11:06:04 EST
4.14-stable review patch. If anyone has any objections, please let me know.
------------------
From: Ken Wang <Ken.Wang@xxxxxxx>
commit 76d6172b6fab16455af4b67bb18a3f66011592f8 upstream.
Old value from bringup was wrong.
Signed-off-by: Ken Wang <Ken.Wang@xxxxxxx>
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -279,10 +279,7 @@ static void soc15_init_golden_registers(
}
static u32 soc15_get_xclk(struct amdgpu_device *adev)
{
- if (adev->asic_type == CHIP_VEGA10)
- return adev->clock.spll.reference_freq/4;
- else
- return adev->clock.spll.reference_freq;
+ return adev->clock.spll.reference_freq;
}