Re: [PATCH 05/13] clk: qcom: add and use alpha register width from PLL properties

[Stephen Boyd]

On 09/28, Abhishek Sahu wrote:
> Currently SUPPORTS_16BIT_ALPHA flag determines the PLL alpha
> register width. If this flag is set then the alpha register width
> is 16 bits otherwise it is 40 bits. The alpha width is always
> fixed for PLL type so it can be added in PLL properties and clock
> driver donât have to specify explicitly.
> 
> The SUPPORTS_16BIT_ALPHA flag is unused in the current code so
> itâs safe to remove this flags.
> 
> Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx>
> ---

Applied to clk-next

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