[tip:ras/core] x86/MCE: Make correctable error detection look at the Deferred bit

From: tip-bot for Yazen Ghannam
Date: Mon Dec 18 2017 - 07:03:00 EST


Commit-ID: 179eb850ac57c06edaed67fc744ba9d902172f96
Gitweb: https://git.kernel.org/tip/179eb850ac57c06edaed67fc744ba9d902172f96
Author: Yazen Ghannam <yazen.ghannam@xxxxxxx>
AuthorDate: Mon, 18 Dec 2017 12:37:14 +0100
Committer: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitDate: Mon, 18 Dec 2017 12:58:29 +0100

x86/MCE: Make correctable error detection look at the Deferred bit

AMD systems may log Deferred errors. These are errors that are uncorrected
but which do not need immediate action. The MCA_STATUS[UC] bit may not be
set for Deferred errors.

Flag the error as not correctable when MCA_STATUS[Deferred] is set and
do not feed it into the Correctable Errors Collector.

[ bp: Massage commit message. ]

Signed-off-by: Yazen Ghannam <yazen.ghannam@xxxxxxx>
Signed-off-by: Borislav Petkov <bp@xxxxxxx>
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Link: http://lkml.kernel.org/r/20171212165143.27475-1-Yazen.Ghannam@xxxxxxx

---
arch/x86/kernel/cpu/mcheck/mce.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 321c7a80..1b2c114 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -528,6 +528,17 @@ bool mce_is_memory_error(struct mce *m)
}
EXPORT_SYMBOL_GPL(mce_is_memory_error);

+static bool mce_is_correctable(struct mce *m)
+{
+ if (m->cpuvendor == X86_VENDOR_AMD && m->status & MCI_STATUS_DEFERRED)
+ return false;
+
+ if (m->status & MCI_STATUS_UC)
+ return false;
+
+ return true;
+}
+
static bool cec_add_mce(struct mce *m)
{
if (!m)
@@ -535,7 +546,7 @@ static bool cec_add_mce(struct mce *m)

/* We eat only correctable DRAM errors with usable addresses. */
if (mce_is_memory_error(m) &&
- !(m->status & MCI_STATUS_UC) &&
+ mce_is_correctable(m) &&
mce_usable_address(m))
if (!cec_add_elem(m->addr >> PAGE_SHIFT))
return true;