[PATCH] x86/acpi/cstate delete some unuseful operations

[TimGuo]

Unuseful cache flush operations which will be executed by ucode when entering C3 will
cause larger C3 enter latency. And the bus master disable operation is not need for
centaur platforms.

Signed-off-by: TimGuo <timguo@xxxxxxxxxxx>
---
 arch/x86/kernel/acpi/cstate.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index dde437f..3eee490 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -51,6 +51,18 @@ void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
        if (c->x86_vendor == X86_VENDOR_INTEL &&
            (c->x86 > 0xf || (c->x86 == 6 && c->x86_model >= 0x0f)))
                        flags->bm_control = 0;
+
+       if (c->x86_vendor == X86_VENDOR_CENTAUR) {
+               /*
+                * on all centaur CPUs, sw need not execute cache flush operation
+                * when entering C3 type state.
+                *
+                * On all Centaur platforms, ARB_DISABLE is not required while
+                * entering C3 type state.
+                */
+               flags->bm_check = 1;
+               flags->bm_control = 0;
+        }
 }
 EXPORT_SYMBOL(acpi_processor_power_init_bm_check);

--
1.9.1



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