page table isolation alternative mechanism

[Albert Cahalan]

We got into the current situation for performance reasons, avoiding the costly
reload of CR3 that a hardware task switch would cause. It seems we'll be
loading CR3 now anyway, so it might be time to reconsider hardware
task switches.

The recent patches leave kernel entry/exit code mapped. Hardware task switches
wouldn't need that. All they need is a single entry in a reduced-size
IDT, for the
doublefault, and a minimal GDT, and a TSS. Taking the fault switches CR3. That
then gets you a proper IDT and GDT because those are virtually mapped.
Not a single byte of kernel code would need to be mapped while user code runs.