[PATCH 4.14 08/14] x86/process: Define cpu_tss_rw in same section as declaration

[Greg Kroah-Hartman]

4.14-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Nick Desaulniers <ndesaulniers@xxxxxxxxxx>

commit 2fd9c41aea47f4ad071accf94b94f94f2c4d31eb upstream.

cpu_tss_rw is declared with DECLARE_PER_CPU_PAGE_ALIGNED
but then defined with DEFINE_PER_CPU_SHARED_ALIGNED
leading to section mismatch warnings.

Use DEFINE_PER_CPU_PAGE_ALIGNED consistently. This is necessary because
it's mapped to the cpu entry area and must be page aligned.

[ tglx: Massaged changelog a bit ]

Fixes: 1a935bc3d4ea ("x86/entry: Move SYSENTER_stack to the beginning of struct tss_struct")
Suggested-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Signed-off-by: Nick Desaulniers <ndesaulniers@xxxxxxxxxx>
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Cc: thomas.lendacky@xxxxxxx
Cc: Borislav Petkov <bpetkov@xxxxxxx>
Cc: tklauser@xxxxxxxxxx
Cc: minipli@xxxxxxxxxxxxxx
Cc: me@xxxxxxxxxxxx
Cc: namit@xxxxxxxxxx
Cc: luto@xxxxxxxxxx
Cc: jpoimboe@xxxxxxxxxx
Cc: tj@xxxxxxxxxx
Cc: cl@xxxxxxxxx
Cc: bp@xxxxxxx
Cc: thgarnie@xxxxxxxxxx
Cc: kirill.shutemov@xxxxxxxxxxxxxxx
Link: https://lkml.kernel.org/r/20180103203954.183360-1-ndesaulniers@xxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 arch/x86/kernel/process.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -47,7 +47,7 @@
  * section. Since TSS's are completely CPU-local, we want them
  * on exact cacheline boundaries, to eliminate cacheline ping-pong.
  */
-__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss_rw) = {
+__visible DEFINE_PER_CPU_PAGE_ALIGNED(struct tss_struct, cpu_tss_rw) = {
 	.x86_tss = {
 		/*
 		 * .sp0 is only used when entering ring 0 from a lower