Re: [PATCH 2/7] x86/enter: MACROS to set/clear IBRS

[Tim Chen]

On 01/04/2018 02:16 PM, Peter Zijlstra wrote:
> On Thu, Jan 04, 2018 at 09:56:43AM -0800, Tim Chen wrote:
>> diff --git a/arch/x86/include/asm/spec_ctrl.h b/arch/x86/include/asm/spec_ctrl.h
>> new file mode 100644
>> index 0000000..16fc4f58
>> --- /dev/null
>> +++ b/arch/x86/include/asm/spec_ctrl.h
> 
> Does this really have to live outside of arch/x86/entry/ ?
> 

There are some inline C routines later in this file
that will be needed by other functions.  Want to consolidate
them in the same file.

> 
>> +.macro ENABLE_IBRS
>> +	ALTERNATIVE "jmp 10f", "", X86_FEATURE_SPEC_CTRL
>> +	PUSH_MSR_REGS
>> +	WRMSR_ASM $MSR_IA32_SPEC_CTRL, $SPEC_CTRL_FEATURE_ENABLE_IBRS
>> +	POP_MSR_REGS
>> +10:
>> +.endm
>> +
>> +.macro DISABLE_IBRS
>> +	ALTERNATIVE "jmp 10f", "", X86_FEATURE_SPEC_CTRL
>> +	PUSH_MSR_REGS
>> +	WRMSR_ASM $MSR_IA32_SPEC_CTRL, $SPEC_CTRL_FEATURE_DISABLE_IBRS
>> +	POP_MSR_REGS
>> +10:
>> +.endm
>> +
>> +.macro ENABLE_IBRS_CLOBBER
>> +	ALTERNATIVE "jmp 10f", "", X86_FEATURE_SPEC_CTRL
>> +	WRMSR_ASM $MSR_IA32_SPEC_CTRL, $SPEC_CTRL_FEATURE_ENABLE_IBRS
>> +10:
>> +.endm
>> +
>> +.macro DISABLE_IBRS_CLOBBER
>> +	ALTERNATIVE "jmp 10f", "", X86_FEATURE_SPEC_CTRL
>> +	WRMSR_ASM $MSR_IA32_SPEC_CTRL, $SPEC_CTRL_FEATURE_DISABLE_IBRS
>> +10:
>> +.endm
>> +
>> +.macro ENABLE_IBRS_SAVE_AND_CLOBBER save_reg:req
>> +	ALTERNATIVE "jmp 10f", "", X86_FEATURE_SPEC_CTRL
>> +	movl	$MSR_IA32_SPEC_CTRL, %ecx
>> +	rdmsr
>> +	movl	%eax, \save_reg
>> +
>> +	movl	$0, %edx
>> +	movl	$SPEC_CTRL_FEATURE_ENABLE_IBRS, %eax
>> +	wrmsr
>> +10:
>> +.endm
>> +
>> +.macro RESTORE_IBRS_CLOBBER save_reg:req
>> +	ALTERNATIVE "jmp 10f", "", X86_FEATURE_SPEC_CTRL
>> +	/* Set IBRS to the value saved in the save_reg */
>> +	movl    $MSR_IA32_SPEC_CTRL, %ecx
>> +        movl    $0, %edx
> 
> whitespace damage

Will fix

> 
>> +	movl    \save_reg, %eax
>> +	wrmsr
>> +10:
>> +.endm
> 
> Should not all those 10 things look like .Ldone_\@ or something ?
> 

They are removed in patch 6 with .Ldone_\@

Tim