Re: [PATCH] x86/retpoline: Avoid return buffer underflows on context switch

[Peter Zijlstra]

On Mon, Jan 08, 2018 at 10:17:19PM +0000, Woodhouse, David wrote:
> On Mon, 2018-01-08 at 23:11 +0100, Peter Zijlstra wrote:
> > 
> > So pjt did alignment, a single unroll and per discussion earlier today
> > (CET) or late last night (PST), he only does 16.
> 
> Hey Intel, please tell us precisely how many RSB entries there are, on
> each family of CPU... :)

Right, and we can always fall back to 32 for unknown models.

> > Also, pause is unlikely to stop speculation, that comment doesn't make
> > sense. Looking at PJT's version there used to be a speculation trap in
> > there, but I can't see that here.
> 
> In this particular code we don't need a speculation trap; that's
> elsewhere. This one is *just* about the call stack. And the reason we
> don't just have...
> 
>  call . + 5
>  call . + 5
>  call . + 5
>  ...
> 
> is because that might get interpreted as a "push %rip" and not go on
> the RSB at all. Hence the 'pause' between each one.

OK, then make the comment say that.