Re: [PATCH v2 0/2] x86/cpu/AMD: Make LFENCE a serializing instruction on AMD

[Borislav Petkov]

On Mon, Jan 08, 2018 at 04:09:12PM -0600, Tom Lendacky wrote:
> To aid in speculation control, the LFENCE instruction will be turned into
> a serializing instruction. There is less performance impact using LFENCE
> in this way compared to MFENCE.
> 
> With LFENCE now being a serializing instruction, it can be also used in
> rdtsc_ordered() in preference to MFENCE_RDTSC.  Since the kernel could
> be running under a hypervisor that does not allow writing to that MSR,
> it must be first verified that the write was successful before setting
> the LFENCE_RDTSC feature.
> 
> The following patches are included in this series:
> - Make LFENCE a serializing instruction on AMD
> - Use LFENCE_RDTSC in preference to MFENCE_RDTSC on AMD
> 
> This patch series is based on tip:x86/pti.
> 
> ---
> 
> Changes from v1:
> - Add a check verifying the MSR was actually updated
> - Remove the third patch that eliminates the MFENCE_RDTSC feature
>   (since the feature is still needed)
> - Adding Dan Williams to the cc since this will impact nospec_barrier(),
>   which will require an alternative_2 to add an MFENCE instruction with
>   an MFENCE_RDTSC check
> 
> Tom Lendacky (2):
>       x86/cpu/AMD: Make LFENCE a serializing instruction
>       x86/cpu/AMD: Use LFENCE_RDTSC in preference to MFENCE_RDTSC

Looks good to me.

Reviewed-by: Borislav Petkov <bp@xxxxxxx>

-- 
Regards/Gruss,
    Boris.

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