On 01/06, David Lechner wrote:
clk_round_rate() 'answers the question "if I were to pass @rate to
clk_set_rate(), what clock rate would I end up with?" without changing
the hardware'.
Currently, clk_divider_round_rate() returns the "current value" when
divider->flags & CLK_DIVIDER_READ_ONLY. But, if CLK_SET_RATE_PARENT is
set, then clk_set_rate() is supposed to propagate the rate change to the
parent clock. So, we need to do check for CLK_SET_RATE_PARENT and if it
is set, ask the parent clock what rate it can provide given the current
divider value.
Signed-off-by: David Lechner <david@xxxxxxxxxxxxxx>
Jerome sent a patch the day before that probably addresses the
same thing. See the message-id of 20180105170959.17266-2-jbrunet@xxxxxxxxxxxx
for more info.