Re: [PATCH 16/16] arm64: Add work around for Arm Cortex-A55 Erratum 1024718

[Suzuki K Poulose]

On 26/01/18 15:33, Dave Martin wrote:
> On Tue, Jan 23, 2018 at 12:28:09PM +0000, Suzuki K Poulose wrote:
> > Some variants of the Arm Cortex-55 cores (r0p0, r0p1, r1p0) suffer
> > from an erratum 1024718, which causes incorrect updates when DBM/AP
> > bits in a page table entry is modified without a break-before-make
> > sequence. The work around is to skip enabling the hardware DBM feature
> > on the affected cores. The hardware Access Flag management features
> > is not affected.
> >
> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx>
> > ---
> >   Documentation/arm64/silicon-errata.txt |  1 +
> >   arch/arm64/Kconfig                     | 14 ++++++++++++++
> >   arch/arm64/kernel/cpufeature.c         | 14 +++++++++++++-
> >   3 files changed, 28 insertions(+), 1 deletion(-)
>
> [...]
>
> > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > index 8af755b8219d..64f1e911c6af 100644
> > --- a/arch/arm64/kernel/cpufeature.c
> > +++ b/arch/arm64/kernel/cpufeature.c
> > @@ -914,9 +914,21 @@ static inline void __cpu_enable_hw_dbm(void)
> >   	isb();
> >   }
> >   
> > +static bool cpu_has_erratum_1024718(void)
> > +{
> > +	static const struct midr_range __maybe_unused cpus[] = {
>
> Do you need __maybe_unused?  If #ifdef were used here then
> __maybe_unused would be needed, but I thought that if code is optimised
> out instead of conditionally copiled, this didn't apply.

Yep. I don't know if the compiler could optimise the array itself with
the tag as a hint. I will double check.

> > +		MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0),	// A55 r0p0 -r1p0
> > +		{},
> > +	};
> > +
> > +	return IS_ENABLED(CONFIG_ARM64_ERRATUM_1024718) &&
> > +	       is_midr_in_range_list(read_cpuid_id(), cpus);
>
> Why have a list with just one entry?  Do you expect more entries over
> time?

Yes. I should have mentioned it here. See [1]

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-January/554516.html


Cheers
Suzuki