Re: x86/microcode/intel: Division by zero panic in 4.9.79 and 4.4.114

From: Borislav Petkov
Date: Wed Feb 07 2018 - 13:13:21 EST


On Wed, Feb 07, 2018 at 04:31:59PM +0000, Rolf Neugebauer wrote:
> arch/x86/kernel/cpu/microcode/core.c | 28 +++++++++++++++++++---------
> 1 file changed, 19 insertions(+), 9 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/microcode/core.c
> b/arch/x86/kernel/cpu/microcode/core.c
> index b3e94ef461fd..1b3e0aa4c511 100644
> --- a/arch/x86/kernel/cpu/microcode/core.c
> +++ b/arch/x86/kernel/cpu/microcode/core.c
> @@ -44,7 +44,7 @@
>
> static struct microcode_ops *microcode_ops;
>
> -static bool dis_ucode_ldr;
> +static bool dis_ucode_ldr = true;
>
> static int __init disable_loader(char *str)
> {
> @@ -81,6 +81,7 @@ struct cpu_info_ctx {
>
> static bool __init check_loader_disabled_bsp(void)
> {
> + u32 a, b, c, d;
> #ifdef CONFIG_X86_32
> const char *cmdline = (const char *)__pa_nodebug(boot_command_line);
> const char *opt = "dis_ucode_ldr";
> @@ -93,8 +94,23 @@ static bool __init check_loader_disabled_bsp(void)
> bool *res = &dis_ucode_ldr;
> #endif
>
> - if (cmdline_find_option_bool(cmdline, option))
> - *res = true;
> + if (!have_cpuid_p())
> + return *res;

That might cause an issue, see 1f161f67a272c. Might wanna backport that
commit too, just in case, for those old CPUID-less geodes.

The rest looks ok.

--
Regards/Gruss,
Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.