Multi MSI with multiple End Points

[Bharat Kumar Gogada]

Hi,

A switch is connected to an RC with 2 EPâs, the RC supports multi MSI.
1st EP requests one MSI vector, 2nd EP requests 4 MSI vectors.

If we are programming hwirq as MSI data (hwirq being obtained from
bitmap_find_next_zero_area, with number of zeroed bits being requested
based on number of irqâs being requested).

This results in 1st EP is given zero as hwirq, 2nd EP is given one as hwirq.

If we use msi data to retrieve virq (use msi data as hwirq), Since as
per PCI spec lower 2 bits of MSI data are modifiable  for 2nd EP, if an
interrupt is raised by 2nd EP on msi data zero, but this is already used
by 1st EP, so the current EPâs interrupt will never be served.

One way to deal with this issue is, using bit shift operations on hwriq
before programming to msi data and at retrieving.

Is there any other way to handle this ?

Regards,
Bharat
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