Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY
From: Kishon Vijay Abraham I
Date: Fri Mar 02 2018 - 03:06:10 EST
Hi,
On Friday 02 March 2018 01:07 PM, Shawn Guo wrote:
> Hi Kishon,
>
> On Fri, Mar 02, 2018 at 11:55:57AM +0530, Kishon Vijay Abraham I wrote:
>> On Thursday 01 March 2018 12:52 PM, Shawn Guo wrote:
>>> From: Pengcheng Li <lpc.li@xxxxxxxxxxxxx>
>>>
>>> It adds device tree bindings document for HiSilicon INNO USB2 PHY.
>>>
>>> Signed-off-by: Pengcheng Li <lpc.li@xxxxxxxxxxxxx>
>>> Signed-off-by: Jiancheng Xue <xuejiancheng@xxxxxxxxxxxxx>
>>> Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx>
>>> ---
>>> .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 ++++++++++++++++++++++
>>> 1 file changed, 52 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
>>> new file mode 100644
>>> index 000000000000..b563cf54ca7b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
>>> @@ -0,0 +1,52 @@
>>> +HiSilicon INNO USB2 PHY
>>> +
>>> +Required properties:
>>> +- compatible: Should be one of the following strings:
>>> + "hisilicon,inno-usb2-phy",
>>> + "hisilicon,hi3798cv200-usb2-phy".
>>> +- reg: Should be the address space for PHY configuration register in peripheral
>>> + controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
>>> +- #phy-cells: Should be 1. The specifier is the index of the PHY port to
>>> + reference.
>>
>> This can be '0' if the consumers directly use phandle to the subnodes.
>
> Yes, I understand that for most of PHY devices #phy-cells is just 0, and
> consumers simply use the phandle without any cell number. But for this
> inno-usb2-phy, every single device contains two PHY ports, and each port
Why not have a separate sub-node for each phy port? Then you can just use
phandle to the subnode in the controller node.
Thanks
Kishon