Re: [PATCH 1/2] watchdog: aspeed: Fix translation of reset mode to ctrl register

[Guenter Roeck]

On Fri, Mar 09, 2018 at 03:58:19PM -0600, Eddie James wrote:
> From: Milton Miller <miltonm@xxxxxxxxxx>
> 
> Assert RESET_SYSTEM bit for any reset and set MODE field from reset
> type.
> 
> The watchdog control register has a RESET_SYSTEM bit that is really
> closer to activate a reset, and RESET_SYSTEM_MODE field that chooses
> how much to reset.
> 
> Before this patch, a node without these optional property would do a
> SOC reset, but a node with properties requesting a cpu or SOC reset
> would do nothing and a node requesting a system reset would do a
> SOC reset.
> 
> Fixes: b7f0b8ad25f3 ("drivers/watchdog: ASPEED reference dev tree properties for config")
> Signed-off-by: Milton Miller <miltonm@xxxxxxxxxx>
> Signed-off-by: Eddie James <eajames@xxxxxxxxxxxxxxxxxx>

Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx>

> ---
>  drivers/watchdog/aspeed_wdt.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
> index ca5b91e..d1987d6 100644
> --- a/drivers/watchdog/aspeed_wdt.c
> +++ b/drivers/watchdog/aspeed_wdt.c
> @@ -232,11 +232,14 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
>  		wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC | WDT_CTRL_RESET_SYSTEM;
>  	} else {
>  		if (!strcmp(reset_type, "cpu"))
> -			wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU;
> +			wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU |
> +				     WDT_CTRL_RESET_SYSTEM;
>  		else if (!strcmp(reset_type, "soc"))
> -			wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC;
> +			wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC |
> +				     WDT_CTRL_RESET_SYSTEM;
>  		else if (!strcmp(reset_type, "system"))
> -			wdt->ctrl |= WDT_CTRL_RESET_SYSTEM;
> +			wdt->ctrl |= WDT_CTRL_RESET_MODE_FULL_CHIP |
> +				     WDT_CTRL_RESET_SYSTEM;
>  		else if (strcmp(reset_type, "none"))
>  			return -EINVAL;
>  	}
> -- 
> 1.8.3.1
>