Re: [PATCH 2/2] watchdog: aspeed: Allow configuring for alternate boot

[Guenter Roeck]

On Wed, Mar 14, 2018 at 02:53:13PM -0500, Eddie James wrote:
> 
> 
> On 03/09/2018 04:06 PM, Guenter Roeck wrote:
> >On Fri, Mar 09, 2018 at 03:58:20PM -0600, Eddie James wrote:
> >>From: Milton Miller <miltonm@xxxxxxxxxx>
> >>
> >>Allow the device tree to specify a watchdog to fallover to
> >>the alternate boot source.
> >>
> >>The aspeeed watchdog can set a latch directing flash chip select 0 to
> >>chip select 1, allowing boot from an alternate media if the watchdog
> >>is not reset in time.  On the ast2400 bank 1 also goes to flash bank 1,
> >>while on the ast2500 the chip selects are swapped.
> >>
> >>Signed-off-by: Milton Miller <miltonm@xxxxxxxxxx>
> >>Signed-off-by: Eddie James <eajames@xxxxxxxxxxxxxxxxxx>
> >This is already documented in the bindings document, so the property
> >should be ok.
> >
> >Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx>
> 
> Thanks. On a related note, our system has need of a way to determine if it's
> currently booted from the alternate chip or not. It seems the only way to
> tell is to look at the ast2400/2500 watchdog timeout status register. We can
> add some debugfs to the aspeed driver I guess, but I wonder if this is a
> common enough situation that the watchdog core could use some debugfs or
> sysfs for providing that info?
> 
If you have the means to determine that the watchdog timed out in the previous
boot, can you just set the WDIOF_CARDRESET status bit ?

Guenter

> Thanks,
> Eddie
> 
> >
> >>---
> >>  drivers/watchdog/aspeed_wdt.c | 3 +++
> >>  1 file changed, 3 insertions(+)
> >>
> >>diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
> >>index d1987d6..f41d246 100644
> >>--- a/drivers/watchdog/aspeed_wdt.c
> >>+++ b/drivers/watchdog/aspeed_wdt.c
> >>@@ -46,6 +46,7 @@ struct aspeed_wdt_config {
> >>  #define WDT_RELOAD_VALUE	0x04
> >>  #define WDT_RESTART		0x08
> >>  #define WDT_CTRL		0x0C
> >>+#define   WDT_CTRL_BOOT_SECONDARY	BIT(7)
> >>  #define   WDT_CTRL_RESET_MODE_SOC	(0x00 << 5)
> >>  #define   WDT_CTRL_RESET_MODE_FULL_CHIP	(0x01 << 5)
> >>  #define   WDT_CTRL_RESET_MODE_ARM_CPU	(0x10 << 5)
> >>@@ -245,6 +246,8 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
> >>  	}
> >>  	if (of_property_read_bool(np, "aspeed,external-signal"))
> >>  		wdt->ctrl |= WDT_CTRL_WDT_EXT;
> >>+	if (of_property_read_bool(np, "aspeed,alt-boot"))
> >>+		wdt->ctrl |= WDT_CTRL_BOOT_SECONDARY;
> >>  	if (readl(wdt->base + WDT_CTRL) & WDT_CTRL_ENABLE)  {
> >>  		/*
> >>-- 
> >>1.8.3.1
> >>
>