Re: [PATCH] x86/ioapic: don't use unstable TSC to detect timer IRQ

[Thomas Gleixner]

On Tue, 20 Mar 2018, Liu, Changcheng wrote:

> In rare case, the TSC is every unstable or can't sync with
> real time hardware clock.

What does that mean?

> After setting "tsc=unstable" in command line, system should use
> delay_without_tsc to detect timer IRQ. Or system could panic as shown in
> below log:

tsc=unstable has nothing to do with TSC being usable for delay loops unless
your TSC is completely broken. Please explain more detailed in which way
this TSC is defect in the hardware. Aside of that is this production
hardware or some experimental silicon?

> diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
> index fb43027..27b1bae 100644
> --- a/arch/x86/kernel/tsc.c
> +++ b/arch/x86/kernel/tsc.c
> @@ -36,7 +36,8 @@ EXPORT_SYMBOL(tsc_khz);
>  /*
>   * TSC can be unstable due to cpufreq or due to unsynced TSCs
>   */
> -static int __read_mostly tsc_unstable;
> +int __read_mostly tsc_unstable;
> +EXPORT_SYMBOL(tsc_unstable);

Even if we decided to do that, there is no need to export that symbol ever.

Thanks,

	tglx