[PATCH 0/4] x86/CPU: Update AMD Last-Level-Cache Information

[Suravee Suthikulpanit]

First, clean up last-level-cache parameters so that it could not
require ifdef CONFIG_SMP. Then, consolidate cache-info-related
code for x86 into arch/x86/kernel/cpu/cacheinfo.c.

Finally, for AMD, introduce new logic to derive LLC ID from APIC ID.

Thanks,
Suravee

Borislav Petkov (2):
  x86/CPU/AMD: Remove unnecessary check for CONFIG_SMP
  x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c

Suravee Suthikulpanit (2):
  perf/x86/amd/uncore: Fix amd_uncore_llc ID to use pre-defined
    cpu_llc_id
  x86/CPU/AMD: Calculate LLC ID from number of sharing threads

 arch/x86/events/amd/uncore.c                       | 21 ++----------
 arch/x86/include/asm/cacheinfo.h                   |  7 ++++
 arch/x86/include/asm/smp.h                         |  1 -
 arch/x86/kernel/cpu/Makefile                       |  2 +-
 arch/x86/kernel/cpu/amd.c                          | 25 ++-------------
 .../kernel/cpu/{intel_cacheinfo.c => cacheinfo.c}  | 37 ++++++++++++++++++++++
 arch/x86/kernel/cpu/common.c                       |  7 ++++
 arch/x86/kernel/smpboot.c                          |  7 ----
 8 files changed, 57 insertions(+), 50 deletions(-)
 create mode 100644 arch/x86/include/asm/cacheinfo.h
 rename arch/x86/kernel/cpu/{intel_cacheinfo.c => cacheinfo.c} (96%)

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2.7.4