Re: [PATCH V2] arm64: tlbflush: avoid writing RES0 bits

From: Shanker Donthineni
Date: Tue Mar 27 2018 - 10:53:28 EST



On 03/27/2018 06:34 AM, Robin Murphy wrote:
> On 27/03/18 04:21, Philip Elcan wrote:
>> Several of the bits of the TLBI register operand are RES0 per the ARM
>> ARM, so TLBI operations should avoid writing non-zero values to these
>> bits.
>>
>> This patch adds a macro __TLBI_VADDR(addr, asid) that creates the
>> operand register in the correct format and honors the RES0 bits.
>>
>> Signed-off-by: Philip Elcan <pelcan@xxxxxxxxxxxxxx>
>> ---
>> Â arch/arm64/include/asm/tlbflush.h | 23 ++++++++++++++++-------
>> Â 1 file changed, 16 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
>> index 9e82dd7..b1205e9 100644
>> --- a/arch/arm64/include/asm/tlbflush.h
>> +++ b/arch/arm64/include/asm/tlbflush.h
>> @@ -60,6 +60,15 @@
>> ÂÂÂÂÂÂÂÂÂ __tlbi(op, (arg) | USER_ASID_FLAG);ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
>> Â } while (0)
>> Â +/* This macro creates a properly formatted VA operand for the TLBI */
>> +#define __TLBI_VADDR(addr, asid)ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
>> +ÂÂÂ ({ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
>> +ÂÂÂÂÂÂÂ unsigned long __ta = (addr) >> 12;ÂÂÂÂÂÂÂ \
>> +ÂÂÂÂÂÂÂ __ta &= GENMASK_ULL(43, 0);ÂÂÂÂÂÂÂÂÂÂÂ \
>> +ÂÂÂÂÂÂÂ __ta |= (unsigned long)(asid) << 48;ÂÂÂÂÂÂÂ \
>> +ÂÂÂÂÂÂÂ __ta;ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
>> +ÂÂÂ })
>
> I'd be inclined to make this a static inline function rather than a macro, since it doesn't need to do any wacky type-dodging, but either way the overall change now looks appropriate;
>
> Acked-by: Robin Murphy <robin.murphy@xxxxxxx>
>

Tested-by: Shanker Donthineni <shankerd@xxxxxxxxxxxxxx>

> Thanks,
> Robin.
>
>> +
>> Â /*
>> ÂÂ *ÂÂÂ TLB Management
>> ÂÂ *ÂÂÂ ==============
>> @@ -117,7 +126,7 @@ static inline void flush_tlb_all(void)
>> Â Â static inline void flush_tlb_mm(struct mm_struct *mm)
>> Â {
>> -ÂÂÂ unsigned long asid = ASID(mm) << 48;
>> +ÂÂÂ unsigned long asid = __TLBI_VADDR(0, ASID(mm));
>> Â ÂÂÂÂÂ dsb(ishst);
>> ÂÂÂÂÂ __tlbi(aside1is, asid);
>> @@ -128,7 +137,7 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
>> Â static inline void flush_tlb_page(struct vm_area_struct *vma,
>> ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ unsigned long uaddr)
>> Â {
>> -ÂÂÂ unsigned long addr = uaddr >> 12 | (ASID(vma->vm_mm) << 48);
>> +ÂÂÂ unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));
>> Â ÂÂÂÂÂ dsb(ishst);
>> ÂÂÂÂÂ __tlbi(vale1is, addr);
>> @@ -154,8 +163,8 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma,
>> ÂÂÂÂÂÂÂÂÂ return;
>> ÂÂÂÂÂ }
>> Â -ÂÂÂ start = asid | (start >> 12);
>> -ÂÂÂ end = asid | (end >> 12);
>> +ÂÂÂ start = __TLBI_VADDR(start, asid);
>> +ÂÂÂ end = __TLBI_VADDR(end, asid);
>> Â ÂÂÂÂÂ dsb(ishst);
>> ÂÂÂÂÂ for (addr = start; addr < end; addr += 1 << (PAGE_SHIFT - 12)) {
>> @@ -185,8 +194,8 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end
>> ÂÂÂÂÂÂÂÂÂ return;
>> ÂÂÂÂÂ }
>> Â -ÂÂÂ start >>= 12;
>> -ÂÂÂ end >>= 12;
>> +ÂÂÂ start = __TLBI_VADDR(start, 0);
>> +ÂÂÂ end = __TLBI_VADDR(end, 0);
>> Â ÂÂÂÂÂ dsb(ishst);
>> ÂÂÂÂÂ for (addr = start; addr < end; addr += 1 << (PAGE_SHIFT - 12))
>> @@ -202,7 +211,7 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end
>> Â static inline void __flush_tlb_pgtable(struct mm_struct *mm,
>> ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ unsigned long uaddr)
>> Â {
>> -ÂÂÂ unsigned long addr = uaddr >> 12 | (ASID(mm) << 48);
>> +ÂÂÂ unsigned long addr = __TLBI_VADDR(uaddr, ASID(mm));
>> Â ÂÂÂÂÂ __tlbi(vae1is, addr);
>> ÂÂÂÂÂ __tlbi_user(vae1is, addr);
>>

--
Shanker Donthineni
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.