Re: [PATCH v2 2/2] x86/mm: implement free pmd/pte page interfaces

From: Chintan Pandya
Date: Fri Apr 27 2018 - 09:43:12 EST

On 4/27/2018 6:18 PM, joro@xxxxxxxxxx wrote:
On Fri, Apr 27, 2018 at 05:22:28PM +0530, Chintan Pandya wrote:
I'm bit confused here. Are you pointing to race within ioremap/vmalloc
framework while updating the page table or race during tlb ops. Since
later is arch dependent, I would not comment. But if the race being
discussed here while altering page tables, I'm not on the same page.

The race condition is between hardware and software. It is not
sufficient to just remove the software references to the page that is
about to be freed (by clearing the PMD/PUD), also the hardware
references in the page-walk cache need to be removed with a TLB flush.
Otherwise the hardware can use the freed (and possibly reused) page to
establish new TLB entries.

Sure ! This is my understanding too (from arm64 context).


linux-arm-kernel mailing list

Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center,
Inc. is a member of the Code Aurora Forum, a Linux Foundation
Collaborative Project