Re: [PATCH v3 2/2] x86/mce: add CMCI support for Centaur CPUs

From: David Wang
Date: Wed May 02 2018 - 06:02:38 EST




> -----Original Mail-----
> Sender: Borislav Petkov [mailto:bp@xxxxxxxxx]
> Time: 2018å4æ30æ 17:48
> Receiver: David Wang <davidwang@xxxxxxxxxxx>
> CC: tony.luck@xxxxxxxxx; tglx@xxxxxxxxxxxxx; mingo@xxxxxxxxxx;
> hpa@xxxxxxxxx; gregkh@xxxxxxxxxxxxxxxxxxx; x86@xxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; linux-edac@xxxxxxxxxxxxxxx; brucechang@via-
> alliance.com; cooperyan@xxxxxxxxxxx; qiyuanwang@xxxxxxxxxxx;
> benjaminpan@xxxxxxxxxxx; lukelin@xxxxxxxxxx; timguo@xxxxxxxxxxx
> Subject: Re: [PATCH v3 2/2] x86/mce: add CMCI support for Centaur CPUs
>
> On Wed, Apr 25, 2018 at 06:33:40PM +0800, David Wang wrote:
> > Newer Centaur support CMCI mechnism, which is compatible with INTEL
> CMCI.
> >
> > Signed-off-by: David Wang <davidwang@xxxxxxxxxxx>
> > ---
> > arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/x86/kernel/cpu/mcheck/mce.c
> > b/arch/x86/kernel/cpu/mcheck/mce.c
> > index 38ccab8..f9a7295 100644
> > --- a/arch/x86/kernel/cpu/mcheck/mce.c
> > +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> > @@ -1757,6 +1757,8 @@ static void __mcheck_cpu_init_vendor(struct
> cpuinfo_x86 *c)
> > }
> > case X86_VENDOR_CENTAUR:
> > mce_centaur_feature_init(c);
> > + mce_intel_feature_init(c);
> > + mce_adjust_timer = cmci_intel_adjust_timer;
>
> This won't work in configs with CONFIG_X86_MCE_INTEL disabled.
>
> You need to define CONFIG_X86_MCE_CENTAUR or so which depends on
> CONFIG_CPU_SUP_CENTAUR and CONFIG_X86_MCE_INTEL and which then
> makes sure the intel CMCI et al stuff is enabled.
>
> --
> Regards/Gruss,
> Boris.
>
> Good mailing practices for 400: avoid top-posting and trim the reply.

OK. I got it.
I will send another patch.
Thank you.

---
David